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> Fall 2002

Exploiting Speculative Multithreading

Josep Torrellas
University of Illinois at Urbana-Champaign

Speculative multithreading is a promising technology to speed up both sequential and explicitly-parallel codes. This technology allows potentially-dependent tasks to execute in parallel. As tasks execute, special support checks that no dependence across tasks is violated. If any are, the offending tasks are squashed and the polluted state is repaired. To unlock the potential of speculative multithreading, we need to make advances in many parts of the puzzle. In this talk, I will discuss how we currently address several critical issues.

One critical issue is the buffering of speculative state. As tasks execute, they generate unsafe memory state that needs to be separately buffered and carefully managed. I will describe some conservative methods that only allow architectural state into main memory, as well as other, more aggressive ones, that permit future state to propagate to main memory. 

For speculative multithreading to deliver high performance, we need to minimize squashes. To this end, I will describe a set of hardware mechanisms based on learning and prediction that can be used to eliminate most squashes due to data dependence violations. 

Another use of speculative multithreading is to speed up explicitly parallel codes. Specifically, I will show how it forms the base for speculative synchronization, whereby tasks execute past active barriers, busy locks, and unset flags instead of waiting. Finally, I will show that a sizable part of the support for speculative multithreading can be re-used to enhance more conventional, instruction-level speculation in machines.


Josep Torrellas is a Professor at the Computer Science department of the University of Illinois. He has published many papers in computer architecture that cover scalable and chip multiprocessor architectures, processing-in-memory architectures, and speculative multithreading. He received a 1994 NSF Young Investigator Award and a 1997 IBM Partnership Award. He was involved in the DASH multiprocessor project at Stanford and the Cedar multiprocessor at Illinois. He has organized many conferences and received funding from NSF, DARPA, NASA, Intel, IBM, and Hewlett-Packard. More information can be found at http://iacoma.cs.uiuc.edu/~torrella





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ECE Seminar Committee:
Tsuhan Chen, Chair
James Bain
James Hoe
Diana Marculescu

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