Simultaneous multithreading is a processor design that combines hardware multithreading with superscalar processor technology to allow multiple threads to issue instructions each cycle. Unlike
other multithreaded architectures, in which only a single hardware context (i.e., thread) is active on any given cycle, SMT permits all thread contexts to simultaneously compete for and share processor resources. Unlike conventional superscalar processors, which suffer from a lack of per-thread instruction-level parallelism, simultaneous multithreading uses multiple threads to compensate for low single-thread ILP. The performance consequence is significantly higher instruction throughput and program speedups on a variety of workloads that include commercial databases, web servers and scientific applications in both multiprogrammed and parallel environments.
SMT technology has been successfully transferred to the commercial sector. Several chip manufacturers have announced SMT products; others are still in the design phase of product development.
Over the past few years we have done SMT-related research in several different areas that include microarchitectural design, and compiler and operating systems support for SMT. In this talk I will cover the two most recent efforts, mini-threads and instruction speculation.